Firmware based Bug Finding Mechanisms in Pre-Silicon Environment

In continuous progression of Moore’s Law, modern architectures in CPU , GPU and custom chips have introduced different features based on the modern application of datacenters, gaming consoles and edge computing. This has significantly increased the complexity of design space and exponentially increased the verification space. With increasing competition, it is pivotal to reduce the verification cycles as well as meet the bug finding techniques tap-out milestone. Quality of the verification can be easily achieved with the bug finding techniques proposed in this paper. These techniques not only facilitate to finding bugs at early stage of design but also provide the quality metric to sign off the closing milestones. Further proposed method provides the evaluation and confidence in health of design based on the market centric workloads.